Toshiba Announces 40nm CMOS Platform Technology

by CXOtoday Staff    Dec 18, 2008

Toshiba Corporation has unveiled a 40nm CMOS platform technology based on 45nm process technology which it expects to deploy on samples the current quarter. Toshiba will start mass production on it in the second quarter, FY2009.

Advanced mobile application requires reduced chip size and lower power consumption. The new platform fabricates SOC (System on Chip) for power-critical mobile applications that consume less than half the power of 65nm generation LSI.

Process migration is a solution to meet the demand; however, shorter channel length tends to cause current leakage. Both reduction of power consumption and chip size shrinkage require controlling channel impurity concentration and fining layout.

Toshiba has established and applied new platform technology for a new activation sequence using flash lamp anneal.

It will further enhance development of low-power-consumption technology for advanced generations.

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